1. Field of the Invention
The present invention relates to a drive circuit and an image display apparatus employing this drive circuit. More particularly, it relates to a drive circuit which outputs image signals in accordance with gradations to signal lines laid in an image display section and a display apparatus which employs the drive circuit.
2. Description of the Related Art
Conventionally, known image display apparatuses include, for example, active-matrix liquid crystal displays. The active-matrix liquid crystal display has a plurality of signal lines for transmitting image signals and a plurality of scanning lines for transmitting scanning signals formed in a matrix-like fashion in an image display area of a substrate, wherein liquid crystals and a thin-film transistor are placed near each intersection of the signal lines and scanning lines; the signal lines are connected to a drive circuit; the scanning lines are connected to a scanning circuit; the gate, drain, and source of each thin-film transistor are connected to a scanning line, signal line, and display electrode, respectively; a counter electrode acting as a transparent electrode is disposed in opposing relation to the display electrode; the liquid crystals are sandwiched between the display electrode and counter electrode; and holding capacitance and liquid-crystal capacitance are connected in parallel to the source electrode. During the process in which an analog voltage corresponding to a gradation signal is applied as an image signal to each signal line, a scanning pulse is applied to each scanning line once per frame time. A pixel signal corresponding to one line of pixels to which scanning pulses are applies is applied to each signal line, the thin-film transistors connected to the scanning line to which scanning pulses are applied are turned on, the image signal from each signal line is applied to the liquid crystals through between the drain and source of each thin-film transistor, and the liquid crystal is charged with pixel capacitance, which is the sum of the holding capacitance and liquid-crystal capacitance. Through repetition of these operations, voltages corresponding to the image signals are applied to the pixel capacitance of the entire panel surface repeatedly every frame time (for example, every 1/60 second) to display images in the image display area of the substrate.
The drive circuits mounted in this type of liquid crystal display include the one described in JP-A-2000-227585, specification. This drive circuit is configured to connect a high-tension side reference voltage VH and a low-tension side reference voltage LV via a plurality of resistor strings, divide the two reference voltages by a plurality of resistor strings, supply the divided voltages and the reference voltages to a D/A conversion circuit, output, from the D/A conversion circuit, analog voltages for the number of gradations necessary for display according to digital gradation signals, and supply each of the analog voltages in sequence to each signal line via a sampling circuit.
In the case of a drive circuit mounted in a multi-gradation image display apparatus, in particular, fewer reference voltages than the number of display gradations are input from outside the substrate equipped with the drive circuit and analog voltages are generated according to the number of gradations by the drive circuit on the substrate. This approach is used for the following reasons: the number of gradations increases exponentially with increases in the bit count of display gradation, but supplying the same number of reference voltages outside the substrate is disadvantageous in terms of the manufacturing cost and manufacturing technology of the image display apparatus because the substrate must be wired corresponding to the number of reference voltages which are to be input.
If voltages divided by resistor strings are generated by the drive circuit to output image signals from the drive circuit to each signal line according to gradations, a through current flows between high reference voltage VH and low reference voltage VL. Since the through current adds to the power consumption of the image display apparatus, it gets in the way of reducing power consumption, especially if a drive circuit is mounted in a battery powered image display apparatus of which low power consumption is required.
To reduce the through current, the resistance value of the resistor strings between the high reference voltage VH and low reference voltage VL must be maximized. On the other hand, with increases in the resistance between the reference voltages and signal line (drain wire), i.e., the output resistance of the drive circuit, the time required to charge the capacitance of the drain wire (wire connected to the drain of the thin-film transistor) becomes longer compared to the output resistance. Therefore, the output resistance of the drive circuit cannot be increased in the case of image display apparatus which feature high-resolution display or a high screen-refresh rate because of short sampling times. Thus, for the drive circuit, the resistance (resistance value) between the reference voltages should be decreased instead of increasing the resistance between the reference voltages and drain wire. As is the case with the prior art, let r1 and r2 denote the resistance values of two resistor strings and let r3 denote the combined resistance (sum of series resistance) of the D/A conversion circuit and sampling circuit, then the relationship among the reference voltage VH, reference voltage VL, and signal line in terms of resistance is represented by a T resistor circuit, in which one end of the resistance r1 is connected to the reference voltage VH, one end of the resistance r2 is connected to the reference voltage VL, and the signal line is connected to the series junction point between the resistance r1 and resistance r2 via the resistance r3. It can be seen that to maximize the resistance between the reference voltages VH and VL without increasing the resistance r0 between the reference voltages and signal line (r1+r3 or r2+r3), r3 can be set to zero (r3=0). To reduce r3, it is necessary to reduce the resistance value in the elements of the D/A conversion circuit and sampling circuit.
However, the D/A conversion circuit and sampling circuit consist of thin-film transistors and to reduce the resistance of the thin-film transistors, it is necessary to increase the mobility or size of the transistors or increase the supply voltage of the drive circuit. Increasing the size of the thin-film transistors or the supply voltage of the drive circuit also increases the current required to operate the thin-film transistors, resulting in increased power consumption of the drive circuit.